FIG. 4 illustrates a process 400 for forming a TFT having a gate electrode with a gate length determined by a spacer, in accordance with some embodiments. In embodiments, the process 400 may be applied to form the TFT 114 in FIG. 1, the TFT 214 in FIG. 2, the TFT 314, or the TFT 304 in FIG. 3.

At block 401, the process 400 may include forming a gate electrode above a substrate. For example, the process 400 may include forming the gate electrode 222 above the substrate 220 as shown in FIG. 2.

At block 403, the process 400 may include forming a gate dielectric layer conformally covering the gate electrode and the substrate. For example, the process 400 may include forming the gate dielectric layer 223 conformally covering the gate electrode 222 and the substrate 220, as shown in FIG. 2. In embodiments, the gate dielectric layer, e.g., the gate dielectric layer 223, may include silicon and oxygen, silicon and nitrogen, yttrium and oxygen, silicon, oxygen, and nitrogen, aluminum and oxygen, hafnium and oxygen, tantalum and oxygen, or titanium and oxygen.

At block 405, the process 400 may include forming a channel layer above the gate dielectric layer. For example, the process 400 may include forming the channel layer 227 above the gate dielectric layer 223, as shown in FIG. 2. In embodiments, the channel layer, e.g., the channel layer 227, may include amorphous silicon, zinc (Zn), or oxygen (O).