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Thin film transistors with spacer controlled gate length

專利號
US11997847B2
公開日期
2024-05-28
申請人
Intel Corporation(US CA Santa Clara)
發(fā)明人
Abhishek A. Sharma; Van H. Le; Gilbert Dewey; Shriram Shivaraman; Yih Wang; Tahir Ghani; Jack T. Kavalieros
IPC分類
H01L29/417; H01L29/45; H01L29/49; H01L29/51; H01L29/66; H01L29/786; H10B12/00
技術(shù)領(lǐng)域
electrode,tft,spacer,gate,may,dielectric,drain,layer,source,in
地域: CA CA Santa Clara

摘要

Embodiments herein describe techniques for a semiconductor device including a TFT having a gate electrode with a gate length determined by a spacer. Embodiments may include a gate electrode above a substrate, a channel layer above the gate electrode, and a source electrode, a drain electrode, and a spacer above the channel layer. The drain electrode may be separated from the source electrode by the spacer. The drain electrode and the source electrode may have different widths or include different materials. Furthermore, the spacer may overlap with the gate electrode, hence the gate length of the gate electrode may be determined by the spacer width. Other embodiments may be described and/or claimed.

說明書

Example 10 may include the method of example 9 and/or some other examples herein, wherein the source electrode is a first source electrode, the spacer is a first spacer, and the method further comprising: forming a second source electrode above the channel layer, wherein the second source electrode is separated from the first source electrode by the pitch; and forming a second spacer between the drain electrode and the second source electrode and above the channel layer.

Example 11 may include the method of example 9 and/or some other examples herein, wherein the second width is about 5% to 15% of the first width.

Example 12 may include the method of example 9 and/or some other examples herein, where the source electrode includes a first conductive material, and the drain electrode includes a second conductive material different from the first conductive material.

Example 13 may include the method of example 9 and/or some other examples herein, where the first width is different from the third width.

Example 14 may include the method of any one of examples 9-13 and/or some other examples herein, further comprising: forming a top dielectric layer above the source electrode, the drain electrode, and the spacer, wherein the spacer includes a first dielectric material, and the top dielectric layer includes a second dielectric material different from the first dielectric material.

Example 15 may include the method of any one of examples 9-13 and/or some other examples herein, wherein the gate dielectric layer includes silicon and oxygen, silicon and nitrogen, yttrium and oxygen, silicon, oxygen, and nitrogen, aluminum and oxygen, hafnium and oxygen, tantalum and oxygen, or titanium and oxygen.

權(quán)利要求

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