That is, recently, in information technology (IT) devices such as mobile phones and smart watches, an LTPS thin film transistor and an oxide semiconductor thin film transistor are formed together on the same substrate to reduce power consumption.

Meanwhile, as a plurality of thin film transistors are formed on different layers, there is a problem in that, when a contact hole of the LTPS thin film transistor is formed, a residual inorganic layer remains or etch uniformity is lowered due to an insulating layer stacked with a thick thickness. For example, the insulating film in a contact hole area of the LTPS thin film transistor has a thickness thicker than that of an existing one by about 6,500 ?. As the thickness of the insulating layer increases, the etch uniformity is lowered when the contact hole is formed, resulting in luminance differences in respective areas, and unevenness or spot defects in a display panel may occur due to an increase in S-factor distribution of the driving transistor.

Accordingly, the present disclosure is characterized in that the first active layer 121 under the contact hole of the first thin film transistor 120, that is, the LTPS thin film transistor, is designed asymmetrically to thereby be in side contact with the source and drain electrodes 122 and 123, so that an influence of a residual inorganic layer within the contact hole is reduced.

FIGS. 5A and 5B are cross-sectional views of contact areas in LIPS thin film transistors according to embodiments of the present disclosure.

FIGS. 6A and 6B are photographs showing the contact areas of FIGS. 5A and 5B.