The second wireless device 200 may include one or more processors 202 and one or more memories 204 and additionally further include one or more transceivers 206 and/or one or more antennas 208. The processor 202 may control the memory 204 and/or the transceiver 206 and may be configured to implement descriptions, functions, procedures, proposals, methods, and/or operation flows disclosed in the present disclosure. For example, the processor 202 may process information in the memory 204 and generate a third information/signal and then transmit a radio signal including the third information/signal through the transceiver 206. Further, the processor 202 may receive a radio signal including a fourth information/signal through the transceiver 206 and then store in the memory 204 information obtained from signal processing of the fourth information/signal. The memory 204 may connected to the processor 202 and store various information related to an operation of the processor 202. For example, the memory 204 may store a software code including instructions for performing some or all of processes controlled by the processor 202 or performing the descriptions, functions, procedures, proposals, methods, and/or operation flowcharts disclosed in the present disclosure. Here, the processor 202 and the memory 204 may be a part of a communication modem/circuit/chip designated to implement the wireless communication technology (e.g., LTE and NR). The transceiver 206 may be connected to the processor 202 and may transmit and/or receive the radio signals through one or more antennas 208. The transceiver 206 may include a transmitter and/or a receiver and the transceiver 206 may be mixed with the RF unit. In the present disclosure, the wireless device may mean the communication modem/circuit/chip.