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Intra-UE coexistence between non-stand-alone and stand-alone mode

專(zhuān)利號(hào)
US12075502B2
公開(kāi)日期
2024-08-27
申請(qǐng)人
Apple Inc.(US CA Cupertino)
發(fā)明人
Fangli Xu; Dawei Zhang; Haijing Hu; Longda Xing; Murtaza A. Shikari; Sethuraman Gurumoorthy; Srinivasan Nimmala; Srirang A. Lovlekar; Yuqin Chen
IPC分類(lèi)
H04W88/06; H04W8/18; H04W8/24; H04W76/16; H04W76/27
技術(shù)領(lǐng)域
ue,5g,nr,may,ran,lte,or,e.g,rat,in
地域: CA CA Cupertino

摘要

Apparatuses, systems, and methods for a user equipment device (UE) to perform intra-UE co-existence between non-stand-alone (NSA) and stand-alone (SA) mode. The UE may be configured to connect to a first radio access network (RAN) operating according to a first radio access technology (RAT) via a first radio and connect to a second RAN operating according to a second RAT via a second radio. The UE may provide, to the first RAN, configuration information during a radio resource control (RRC) connection procedure. The configuration information may indicate a dual connectivity status of the UE. The dual connectivity status may include indication disabling (enabling) dual connectivity for the UE, working frequencies associated with the second RAN, and/or configurations associated with the second RAN. The UE may receive, from the first RAN, a dual connectivity configuration that may be based on the dual connectivity status of the UE and operate accordingly.

說(shuō)明書(shū)

In some embodiments, the cellular communication circuitry 330 may be configured to perform methods for intra-UE co-existence between non-stand-alone (NSA) and stand-alone (SA) mode as further described herein.

As described herein, the modem 510 may include hardware and software components for implementing the above features or for time division multiplexing UL data for NSA NR operations, as well as the various other techniques described herein. The processors 512 may be configured to implement part or all of the features described herein, e.g., by executing program instructions stored on a memory medium (e.g., a non-transitory computer-readable memory medium). Alternatively (or in addition), processor 512 may be configured as a programmable hardware element, such as an FPGA (Field Programmable Gate Array), or as an ASIC (Application Specific Integrated Circuit). Alternatively (or in addition) the processor 512, in conjunction with one or more of the other components 530, 532, 534, 550, 570, 572, 335 and 336 may be configured to implement part or all of the features described herein.

In addition, as described herein, processors 512 may include one or more processing elements. Thus, processors 512 may include one or more integrated circuits (ICs) that are configured to perform the functions of processors 512. In addition, each integrated circuit may include circuitry (e.g., first circuitry, second circuitry, etc.) configured to perform the functions of processors 512.

權(quán)利要求

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