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Display apparatus

專利號
US12075661B2
公開日期
2024-08-27
申請人
LG Display Co., Ltd.(KR Seoul)
發(fā)明人
Kyeong-Ju Moon; So-Young Noh; Ki-Tae Kim; Hyuk Ji
IPC分類
H01L29/786; H10K59/124
技術領域
electrode,transistor,film,layer,thin,gate,insulating,pattern,may,first
地域: Seoul

摘要

A display apparatus includes a first TFT in a display area including a first semiconductor pattern including a polysilicon, a first gate electrode overlapping with the first semiconductor pattern under conditions that a first gate insulating layer is interposed, and first source and drain electrodes connected to the first semiconductor pattern, a second TFT in the display area including a second semiconductor pattern including a first oxide semiconductor, a second gate electrode overlapping with the second semiconductor pattern under conditions that second and third gate insulating layers are interposed, second source and drain electrodes connected to the second semiconductor pattern, and a third TFT in a non-display area including a third semiconductor pattern including a second oxide semiconductor, a third gate electrode overlapping with the third semiconductor pattern under conditions that the third gate insulating layer is interposed, and third source and drain electrodes connected to the third semiconductor pattern.

說明書

In another aspect of the present disclosure, a display apparatus includes a substrate including a display area and a non-display area disposed adjacent to the display area, a first thin film transistor disposed in the display area of the substrate, the first thin film transistor including a first semiconductor pattern including a first oxide semiconductor, a first gate electrode overlapping with the first semiconductor pattern under a condition that a second gate insulating layer and a third gate insulating layer are interposed between the first gate electrode and the first semiconductor pattern, a first source electrode connected to the first semiconductor pattern, and a first drain electrode connected to the first semiconductor pattern, a second thin film transistor disposed in the display area of the substrate, the second thin film transistor including a second semiconductor pattern including a second oxide semiconductor, a second gate electrode overlapping with the second semiconductor pattern under a condition that the third gate insulating layer is interposed between the second gate electrode and the second semiconductor pattern, a second source electrode connected to the second semiconductor pattern, and a second drain electrode connected to the second semiconductor pattern, and a third thin film transistor disposed in the non-display area of the substrate, the third thin film transistor including a third semiconductor pattern including a polysilicon, a third gate electrode overlapping with the third semiconductor pattern under a condition that a first gate insulating layer is interposed between the third gate electrode and the third semiconductor pattern, and a third source electrode connected to the third semiconductor pattern, and a third drain electrode connected to the third semiconductor pattern.

權利要求

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