Specifically, the transceiver 810 is configured to monitor, based on a size of first downlink control information (DCI), the first DCI and second DCI that are sent by a network device, where the first DCI is carried on a power saving signal shared by a plurality of terminal devices including the terminal device, and the second DCI is carried on a terminal device specific power saving signal.

The processor 820 is configured to determine, based on the detected first DCI and/or the detected second DCI, whether to monitor a data channel in a first time period.

For a specific working process and beneficial effects of the terminal device 800, refer to the descriptions in the embodiment shown in FIG. 5. Details are not described herein again.

FIG. 9 is a schematic diagram of a structure of a network device according to another embodiment of this application. As shown in FIG. 9, the network device 900 may include a transceiver 910, a processor 920, and a memory 930.

FIG. 9 shows only one memory and one processor. In an actual network device product, there may be one or more processors and one or more memories. The memory may also be referred to as a storage medium, a storage device, or the like. The memory may be disposed independent of the processor, or may be integrated with the processor. This is not limited in this embodiment of this application.

The transceiver 910, the processor 920, and the memory 930 communicate with each other through an internal connection path and transfer a control signal and/or a data signal.