In the embodiments of the disclosure, a spacer material is filled above the substrate, until an upper end surface of the spacer material is flush with an upper end surface of each of the plurality of active region structures, so that the shallow trench isolation structure is formed around the plurality of active region structures. Referring to FIG. 6, which is a fourth schematic diagram of a semiconductor storage device in embodiments of this disclosure, in practice, the spacer material is filled above the substrate 10, so that the plurality of active region structures 11 are completely wrapped up within the spacer material to form the shallow trench isolation structure 12. As shown, the substrate 10 includes the plurality of active region structures 11 and the shallow trench isolation structure 12, an upper end surface of the shallow trench isolation structure 12 is flush with the upper end surface of each of the plurality of active region structures 11, the various active region structures 11 are isolated from one another through the shallow trench isolation structures 12.

The shallow trench isolation structure 12 includes silicon oxide, the embodiments of the disclosure does not impose any limitation on the material of the shallow trench isolation structure.

At S220, the plurality of active region structures and the shallow trench isolation structure are etched for the first time to form a plurality of conductive line trenches that extend parallel to each other along the first direction, in the first etching, an etching rate of the plurality of active region structures is greater than an etching rate of the shallow trench isolation structure.