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Semiconductor storage device and forming method thereof

專利號
US12108590B2
公開日期
2024-10-01
申請人
CHANGXIN MEMORY TECHNOLOGIES, INC.(CN Hefei)
發(fā)明人
Jingwen Lu
IPC分類
H10B12/00; H01L21/762; H01L29/06
技術(shù)領(lǐng)域
conductive,region,trench,layer,sub,shallow,structures,sidewall,structure,isolation
地域: Hefei

摘要

The disclosure relates to a semiconductor storage device and a forming method thereof. The semiconductor storage device includes a substrate; a plurality of active region structures provided on the substrate; a shallow trench isolation structure provided within the substrate, the shallow trench isolation structure surround the plurality of active region structures; a plurality of conductive line structures, extending parallel to each other along a first direction, the conductive line structure include a first region and a second region, the first region being located over each of the plurality of active region structures, the second region is located over the shallow trench isolation structure; in a direction perpendicular to the substrate, the depth of the first region is greater than the depth of the second region.

說明書

Based on the above-mentioned embodiments, referring to FIG. 1, which is a schematic structural diagram of a semiconductor storage device in embodiments of this disclosure, the semiconductor storage device includes a substrate 10, for example, the semiconductor substrate 10 is composed of silicon. Then, a plurality of active region structures 11 are provided on the substrate 10, that is, a surface of the substrate 10 is connected to a surface of each of the plurality of active region structures 11, an upper surface of the substrate 10 is connected to the plurality of active region structures 11, each of the active region structures 11 is in the shape of an island-shaped pillar. A shallow trench isolation structure 12 is provided within the substrate 10, the shallow trench isolation structure 12 surrounds the plurality of active region structures 11, the shallow trench isolation structure 12 is configured to isolate the plurality of active region structures 11, that is, each of the active region structures 11 is isolated from one another by the shallow trench isolation structure 12, the various active region structures 11 are disconnected from one another. Further, the semiconductor storage device includes the plurality of conductive line structures, the plurality of conductive line structures extending parallel to each other along a first direction 90, each of the conductive line structures includes a first region 20 and a second region 30, the first region 20 is located over each of the plurality of active region structures 11, the second region 30 is located over the shallow trench isolation structure 12; and the first region 20 and the second region 30 are formed by etching along a direction perpendicular to the substrate 10, a depth of the first region 20 is greater than a depth of the second region 30.

權(quán)利要求

1
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