Display substrate including light shielding layer having multiple imaging pinholes formed therein and method for manufacturing the same, display panel and display device
地域：
Beijing
摘要
A display substrate, a manufacturing method thereof, a display panel and a display device are provided. The display substrate includes: an array layer on a base substrate and a light shielding layer on a side of the array layer away from the base substrate, wherein the array layer includes a driving transistor and a switching transistor, the switching transistor is a transistor connected to a gate electrode of the driving transistor, a plurality of imaging pinholes are formed in the light shielding layer, and a first orthographic projection of the imaging pinholes onto the base substrate and a second orthographic projection of an active layer pattern of the switching transistor in the array layer onto the base substrate do not overlap at least in part.
說(shuō)明書
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The present application is a U.S. national phase application of a PCT Application No. PCT/CN2020/121787 filed on Oct. 19, 2020, which claims a priority to Chinese patent application No. 201911117696.5, filed on Nov. 15, 2019, disclosures of which are incorporated herein by reference in their entireties.
The present disclosure relates to the field of display technology, and in particular, to a display substrate and a method for manufacturing the same, a display panel and a display device.
In the field of electronic equipment, especially in the field of mobile phones, it has become standard to equip biometrics, especially fingerprint recognition technique for identity authentication and other operations. Fingerprint recognition technique associates a person with his fingerprint, and verifies his true identity by comparing his fingerprint with pre-stored fingerprints. Humans have unique skin textures (including fingerprints) that are distinct from one another in terms of pattern, breakpoint and intersection. Relying on this uniqueness and stability, fingerprint recognition technique can be realized.
權(quán)利要求
What is claimed is:1. A display substrate, comprising: an array layer on a base substrate, and a light shielding layer on a side of the array layer away from the base substrate,wherein the array layer comprises a driving transistor and a switching transistor, the switching transistor is a transistor connected to a gate electrode of the driving transistor, a plurality of imaging pinholes are formed in the light shielding layer, and a first orthographic projection of the imaging pinholes onto the base substrate and a second orthographic projection of an active layer pattern of the switching transistor in the array layer onto the base substrate do not overlap at least in part; wherein, an orthographic projection of a channel region in an active layer pattern of a control transistor in the array layer onto the base substrate is a third orthographic projection, and an orthographic projection of a channel region in an active layer pattern of the driving transistor onto the base substrate is a fourth orthographic projection; an orthographic projection of a channel region in the active layer pattern of the switching transistor onto the base substrate is a fifth orthographic projection; a shortest distance between an edge of the first orthographic projection and the fifth orthographic projection is greater than a distance between the edge of the first orthographic projection and the third orthographic projection; the shortest distance between the edge of the first orthographic projection and the fifth orthographic projection is greater than a distance between the edge of the first orthographic projection and the fourth orthographic projection; the control transistor is a transistor in the array layer that is other than the switching transistor and the driving transistor. 2. The display substrate according to claim 1 , further comprising: a first pixel region provided with an imaging pinhole, and a second pixel region not provided with an imaging pinhole;wherein an area of the first pixel region is larger than an area of the second pixel region. 3. The display substrate according to claim 2 , wherein an aspect ratio of the switching transistor in the first pixel region is less than an aspect ratio of the switching transistor in the second pixel region. 4. The display substrate according to claim 1 , wherein the first orthographic projection and an orthographic projection of a first gate metal layer, a second gate metal layer and a first source-drain metal layer comprised in the array layer onto the base substrate do not overlap;wherein the first gate metal layer forms gate electrodes of the driving transistor, the switching transistor and the control transistor; the second gate metal layer forms an initial voltage line providing an initial voltage to the switching transistor and the control transistor; and the first source-drain metal layer forms source electrodes and drain electrodes of the driving transistor, the switching transistor and the control transistor. 5. The display substrate according to claim 1 , wherein a diameter of each of the imaging pinholes is greater than or equal to 2 um, and less than or equal to 20 um. 6. The display substrate according to claim 5 , wherein the diameter of each of the imaging pinholes is greater than or equal to 4 um, and less than or equal to 7 um. 7. The display substrate according to claim 1 , wherein N pixel regions are each provided with one of the plurality of imaging pinholes, and N is a positive integer greater than or equal to 3, and less than or equal to 10. 8. The display substrate according to claim 1 , wherein the array layer comprises an active layer, a first gate metal layer, a second gate metal layer, and a first source-drain metal layer that are sequentially provided between the base substrate and the light shielding layer; the display substrate further comprises an anode layer;the light-shielding layer comprises a light-shielding pattern and a connection pattern; the light-shielding pattern has the imaging pinholes; wherein a light leakage gap is between the light-shielding pattern and the connection pattern; the first source-drain metal layer is electrically connected to the anode layer; wherein the active layer comprises active layer patterns of the driving transistor, the switching transistor and the control transistor; the first gate metal layer forms gate electrodes of the driving transistor, the switching transistor and the control transistor; the second gate metal layer forms an initial voltage line providing an initial voltage to the switching transistor and the control transistor; and the first source-drain metal layer forms source electrodes and drain electrodes of the driving transistor, the switching transistor and the control transistor. 9. The display substrate according to claim 1 , wherein the array layer is a thin film transistor array layer. 10. The display substrate according to claim 1 , wherein the thin film transistor array layer comprises the array layer and a second source-drain metal layer, and the second source-drain metal layer is reused as the light shielding layer. 11. The display substrate according to claim 1 , wherein the channel region of the active layer pattern of the driving transistor is of a zigzag shape, the zigzag shape comprises a plurality of first portions and a plurality of second portions, and the plurality of first portions are consecutively connected, with one of the plurality of second portions being connected between every two adjacent first portions, to form the zigzag shape. 12. A display panel, comprising the display substrate according to claim 1 . 13. A display device, comprising the display panel according to claim 12 .
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