Further, it is necessary that the imaging pinholes are not blocked by the metal pattern, so as to improve the accuracy of the pinhole-imaging based fingerprint recognition.

In the embodiments of the present disclosure, a diameter of the imaging pinhole may be greater than or equal to 2 um, and less than or equal to 20 uml, but the present disclosure is not limited to this.

In an optional case, a diameter of the imaging pinhole may be greater than or equal to 4 um, and less than or equal to 7 um, but the present disclosure is not limited to this.

In a specific implementation, in the display substrate of the embodiment of the present disclosure, the density of the imaging pinholes can be flexibly adjusted according to the actual situation. One imaging pinhole may be provided within N pixel regions, where N is a positive integer.

In an optional case, N may be greater than or equal to 3, and less than or equal to 10, but the present disclosure is not limited to this.

Specifically, the array layer may include an active layer, a gate insulating layer, a first gate metal layer, a first insulating layer, a second gate metal layer, an interlayer dielectric layer, a first source-drain metal layer, and a second insulating layer that are sequentially provided between the base substrate and the light shielding layer; the display substrate further includes a planarization layer and an anode layer that are sequentially provided on a side of the light shielding layer away from the second insulating layer;

• • the light-shielding layer includes a light-shielding pattern and a connection pattern; the light-shielding pattern has the imaging pinholes;