The present disclosure provides a display substrate, including an array layer on a base substrate and a light shielding layer on a side of the array layer away from the base substrate, the array layer includes a driving transistor and a switching transistor, the switching transistor is a transistor connected to a gate electrode of the driving transistor, a plurality of imaging pinholes are formed in the light shielding layer, and a first orthographic projection of the imaging pinholes onto the base substrate and a second orthographic projection of an active layer pattern of the switching transistor in the array layer onto the base substrate do not overlap at least in part.

In an implementation, an orthographic projection of a channel region in an active layer pattern of a control transistor in the array layer onto the base substrate is a third orthographic projection, and an orthographic projection of a channel region in an active layer pattern of the driving transistor onto the base substrate is a fourth orthographic projection;

• • an orthographic projection of a channel region in the active layer pattern of the switching transistor onto the base substrate is a fifth orthographic projection;
  • a shortest distance between an edge of the first orthographic projection and the fifth orthographic projection is greater than a distance between the edge of the first orthographic projection and the third orthographic projection;
  • the shortest distance between the edge of the first orthographic projection and the fifth orthographic projection is greater than a distance between the edge of the first orthographic projection and the fourth orthographic projection;