In another example not illustrated, when the circuit CTRL compares the voltage VT to thresholds Vth, Vth_l and possibly Vth_h, if the voltage VT is comprised between the thresholds Vth and Vth_l, the circuit CTRL thus determinates that the mains was lost, and if the voltage VT is, in absolute value, above the threshold Vth_h, the circuit CTRL thus determinates that there is an overvoltage issue with the mains.
FIG. 4 illustrates an alternative embodiment of the USB interface 214 of FIG. 2.
Only the differences between the interface 214 of the embodiment described in relation to FIG. 2 and the interface 214 of the alternative embodiment illustrated by FIG. 4 are here described.
In particular, interface 214 of FIG. 4 differs from the one of FIG. 2 in that the secondary winding 1102 is connected between node 122 and component 116, component 116 is connected between node 118 and the winding 1102, the phase point of the winding 1101 is on the side of node 108 and the phase point of the winding 1102 is on the side of the node 122. As in FIG. 2, the node 123 is the interconnection node between the winding 1102 and the component 116.
FIG. 5 illustrates an embodiment of a method implemented by the interface 214 of the FIG. 4.
