An input of the comparator 604 receives voltage Vth_l′ and another input of the comparator 604 receives the voltage VT′. A binary signal C2 is outputted by the comparator 604. Signal C2 is at a first level when the voltage VT′ is above the voltage Vth_l′, which indicates that the voltage VT is, in absolute value, above the threshold Vth_l, signal C2 being at a second level when the voltage VT′ is below the voltage Vth_l′, which indicates that the voltage VT is, in absolute value, below the threshold Vth_l. In this example, the voltage VT′ is received by the non-inverting input (+) of the comparator 604 and the voltage Vth_l′ is received by the inverting input (?) of the comparator 604. As a result, the binary signal C2 is at a high level when the voltage VT′ is above the voltage Vth_l′ and at low level when the voltage VT′ is below the voltage Vth_l′.
The circuit 600 comprises comparator 605. The comparator 605 is configured to compare the value of the voltage VT with the threshold Vth_h, by comparing the voltage VT′ with a voltage Vth_h′ representative of the threshold Vth_h.
In particular, when stage 601 provides a positive voltage VT′, the voltage Vth_h′ is positive, simplifying the implementation of the comparator 605. Moreover, when the stage 601 provides a voltage VT′ independents from the voltages Vsrc and Vref, the voltage Vth_h′ is independent from voltages Vsrc and Vref, which simplifies the implementation of the comparator 605 because voltage Vth_h′ does not change when set point value Vref is changed.