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USB interface

專利號(hào)
US12160174B2
公開(kāi)日期
2024-12-03
申請(qǐng)人
STMicroelectronics (Grenoble 2) SAS; STMicroelectronics S.r.l.(FR Grenoble IT Agrate Brianza)
發(fā)明人
Jean Camiolo; Francesco Ferrazza; Nathalie Ballot
IPC分類(lèi)
H02M3/335; G06F13/42; H02M1/32
技術(shù)領(lǐng)域
voltage,vt,vth_l,vth_h,vth,ctrl,threshold,value,winding,vsrc
地域: Grenoble

摘要

In an embodiment, a USB interface includes a transformer, a primary winding of the transformer, and a first switch in series between a first and a second node, a secondary winding of the transformer and a component in series between a third and a fourth node, the fourth node configured to be set a first reference potential, a second switch connected between the third node and a first terminal, the first terminal configured to provide an output voltage of the USB interface; wherein the component is configured to avoid a current circulation in the secondary winding when the first switch is closed and a control circuit configured to compare a first voltage of an interconnection node between the secondary winding and the component to a first threshold and compare the first voltage to a second threshold when the first voltage is, in absolute values, above the first threshold.

說(shuō)明書(shū)

An input of the comparator 605 receives voltage Vth_h′ and another input of the comparator 605 receives the voltage VT′. A binary signal C3 is outputted by the comparator 605. Signal C3 is at a first level when the voltage VT′ is above the voltage Vth_h′, which indicates that the voltage VT is, in absolute value, above the threshold Vth_h, signal C3 being at a second level when the voltage VT′ is below the voltage Vth_h′, which indicates that the voltage VT is, in absolute value, below the threshold Vth_h. In this example, the voltage VT′ is received by the inverting input (?) of the comparator 605 and the voltage Vth_h′ is received by the non-inverting input (+) of the comparator 605. As a result, the binary signal C3 is at a high level when the voltage VT′ is below the voltage Vth_h′ and at low level when the voltage VT′ is above the voltage Vth_h′.

Based on the value or level of the signals C1, C2, and C3, the circuit CTRL determines whether there is an issue on the mains.

In this example, when the signal C1 is at its high level, the circuit CTRL determines that there is an issue with the mains if one of the signals C2 and C3 is at its low level.

In an embodiment where the voltage VT is not compared to threshold Vth_h, the comparator 605 of the circuit 600 is omitted.

權(quán)利要求

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