FIG. 4 is a timing chart showing exemplary operation of the switching circuit apparatus 3 of FIG. 3. Respective rows of FIG. 4 show gate-source voltages Vgs(Q21) and Vgs(Q22) of the switching elements Q21 and Q22, a voltage V(N21) at the node N21 of FIG. 3 and drain-source voltages Vds(Q21) to Vds(Q24) of the switching elements Q21 to Q24. In the example of FIG. 4, it is considered that when all the switching elements Q21 to Q24 are turned off, only the switching elements Q21 and Q22 transition from off to on.

In the time interval t0 to t1, when the switching element Q22 is turned off, the capacitor C21 cannot be charged, and the voltage V(N21) at the node N21 is low.

At the time moment t1, the control signal Ct121 for transitioning the switching elements Q21 and Q22 from off to on is inputted to the drive circuits DRV21 and DRV22. However, since the voltage of the capacitor C21 is insufficient, at the time moment t1, only the gate-source voltage Vgs(Q22) of the switching element Q22 rises, and the gate-source voltage Vgs(Q21) of the switching element Q21 remains low.