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Apparatuses and methods for compensating for crosstalk noise at input receiver circuits

專(zhuān)利號(hào)
US12160231B2
公開(kāi)日期
2024-12-03
申請(qǐng)人
Lodestar Licensing Group LLC
發(fā)明人
Raghukiran Sreeramaneni; Daniel B. Penney
IPC分類(lèi)
H03K5/00; G11C11/4093; H03K5/01; H03K5/1252; H03K17/687
技術(shù)領(lǐng)域
signal,input,ch0,crosstalk,var,may,circuit,idref,ch1,receiver
地域： IL IL Evanston

摘要

An input receiver circuit for a signal line may receive inputs from other signal lines to mitigate crosstalk noise present on the signal line. In some examples, the input receiver circuit may include a transistor with a programmable width. In some examples, the input receiver circuit may include a bias current generator with a programmable current. The width and/or current may be programmed based on an amount of crosstalk noise introduced by the other signal line. In some examples, the input receiver circuit may include a resistance and/or a capacitance. In some examples the resistor and/or capacitor may be programmable. The resistance and/or capacitance may be programmed based on a duration of the crosstalk noise on the signal line.

說(shuō)明書(shū)

FIG. 3 is a block diagram of an input circuit 300 according to an embodiment of the disclosure. The input circuit 300 may be included in an input/output circuit. In some embodiments of the disclosure the input circuit 300 is included in the input/output circuit 260 of the semiconductor device 200 FIG. 2. The input circuit 300 may be provided input signals IN0-INn from external terminals, where n is a natural number. In various embodiments of the disclosure, the input signals may be, for example, command and address signals, select signals, input signals, and/or data signals.

The input circuit 300 may be further provided clocks CLK_t and CLK_c. The CLK_t and CLK_c clocks may be complementary. The CLK_t and CLK_c clocks may cause the input circuit 300 to capture the IN0-INn signals, thereby controlling a timing of the input circuit 300. The CLK_t and CLK_c clocks may be, for example, system clocks CK_t and CK_c, data clocks WCK_t and WCK_c, and/or clocks based on system clocks, data clocks, etc. in various embodiments of the disclosure.

權(quán)利要求

1
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