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Apparatuses and methods for compensating for crosstalk noise at input receiver circuits

專利號
US12160231B2
公開日期
2024-12-03
申請人
Lodestar Licensing Group LLC
發(fā)明人
Raghukiran Sreeramaneni; Daniel B. Penney
IPC分類
H03K5/00; G11C11/4093; H03K5/01; H03K5/1252; H03K17/687
技術(shù)領(lǐng)域
signal,input,ch0,crosstalk,var,may,circuit,idref,ch1,receiver
地域: IL IL Evanston

摘要

An input receiver circuit for a signal line may receive inputs from other signal lines to mitigate crosstalk noise present on the signal line. In some examples, the input receiver circuit may include a transistor with a programmable width. In some examples, the input receiver circuit may include a bias current generator with a programmable current. The width and/or current may be programmed based on an amount of crosstalk noise introduced by the other signal line. In some examples, the input receiver circuit may include a resistance and/or a capacitance. In some examples the resistor and/or capacitor may be programmable. The resistance and/or capacitance may be programmed based on a duration of the crosstalk noise on the signal line.

說明書

Another node of transistor 802 and another node of transistor 806 may be coupled to a bias current generator 810, which may be coupled to a common voltage-VSS in the example shown in FIG. 8. Current may flow from the load device 801 through the transistors 802 and 806 to the bias current generator 810. The gate of transistor 802 may receive an input signal from a signal line CH1 at an input 804. In some embodiments, the input signal may be a data signal received via a DQ signal line. A gate of transistor 806 may receive a reference voltage VREF at an input 808. In some embodiments, VREF may be provided by a voltage generator, such as voltage generator 270.

權(quán)利要求

1
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