The input receiver circuit 1000 may operate in a similar manner to the input receiver circuit 600 shown in FIG. 6 to generate a mitigation signal to cancel the effects of crosstalk noise in the input signal on signal line CH1. However, in contrast to input receiver circuit 600, the widths of transistors 1012, 1016, 1028, and 1030 may be fixed. In some embodiments, the widths of transistors 1012, 1016, 1028, and 1030 may be selected such that the total width of the transistors on either side of the differential pair circuit 1007 are equal. Instead, magnitudes of bias currents provided by bias current generators 1032 and 1034 may be programmed by setting values for variables VarI0 and Var I1, respectively. Similar to the widths of the transistors, the magnitudes of the bias currents may determine a magnitude of a contribution to the mitigation signal input signals on signal line CH0 and CH2 provide. Thus, the bias currents provided by bias current generators 1032 and 1034 may be used to control the magnitude of the mitigation signal. That is, the bias current generators 1032 and 1034 may be used to alter a current 1005 flowing through the reference side of the differential pair circuit 1007 and the current 1003 flowing through the input side of the differential pair circuit 1007 to compensate for the effect of the crosstalk noise on the differential signal provided to the load device 1001. In some applications and/or architectures, it may be easier to adjust a magnitude of a bias current generated by a bias current generator than an effective width of a transistor.