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Apparatuses and methods for compensating for crosstalk noise at input receiver circuits

專(zhuān)利號(hào)
US12160231B2
公開(kāi)日期
2024-12-03
申請(qǐng)人
Lodestar Licensing Group LLC
發(fā)明人
Raghukiran Sreeramaneni; Daniel B. Penney
IPC分類(lèi)
H03K5/00; G11C11/4093; H03K5/01; H03K5/1252; H03K17/687
技術(shù)領(lǐng)域
signal,input,ch0,crosstalk,var,may,circuit,idref,ch1,receiver
地域： IL IL Evanston

摘要

An input receiver circuit for a signal line may receive inputs from other signal lines to mitigate crosstalk noise present on the signal line. In some examples, the input receiver circuit may include a transistor with a programmable width. In some examples, the input receiver circuit may include a bias current generator with a programmable current. The width and/or current may be programmed based on an amount of crosstalk noise introduced by the other signal line. In some examples, the input receiver circuit may include a resistance and/or a capacitance. In some examples the resistor and/or capacitor may be programmable. The resistance and/or capacitance may be programmed based on a duration of the crosstalk noise on the signal line.

說(shuō)明書(shū)

Similar to the input receiver circuit 600, the resistances and capacitances of resistances 1020, 1022 and/or capacitances 1024, 1026 may be programmable by setting variables Var D0, Var D1, Var C0, and/or Var C1. The values of the resistances and capacitances may determine the RC time constants of the low pass filters 1036, 1038.

In some embodiments, the variables Var I0, Var I1, Var C0, Var C1, Var D0, and Var D1 may be programmed by a device external to the memory device including the input receiver circuit 1000, for example, a memory controller, such as controller 10. In some embodiments, the values of the variables may be set during a calibration routine (e.g., a DQ calibration routine) performed by the controller and/or memory device. In some embodiments, the values of the variables may be stored in one or more mode registers, such as mode register 230. In some embodiments, one or more of the variables may be set during manufacturing and/or testing of the device including the input receiver circuit 1000.

FIG. 11 is a flow chart of a method according to an embodiment of the disclosure. In some embodiments, the method 1100 may be performed in whole or in part by a memory device, such as memory 110 and/or semiconductor memory device 200. In some embodiments, the method 1100 may be performed, in whole or in part, by an input receiver circuit, such as input receiver circuit 310, input receiver circuit 500, input receiver circuit 600, input receiver circuit 800, and/or input receiver circuit 1000.

權(quán)利要求

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