A memory may be further disposed in the processor 201, and is configured to store instructions and data. In some possible implementation solutions, the memory in the processor 201 is a cache. The memory may store instructions or data just used or cyclically used by the processor 201. If the processor 201 needs to use the instructions or the data again, the processor may directly invoke the instruction or the data from the memory. This avoids repeated access and reduces waiting time of the processor 201, to improve system efficiency.
In some possible implementation solutions, the processor 201 may include one or more interfaces. The interface may include an inter-integrated circuit (inter-integrated circuit, I2C) interface, an inter-integrated circuit sound (inter-integrated circuit sound, I2S) interface, a pulse code modulation (pulse code modulation, PCM) interface, a universal asynchronous receiver/transmitter (universal asynchronous receiver/transmitter, UART) interface, a mobile industry processor interface (mobile industry processor interface, MIPI), a general-purpose input/output (general-purpose input/output, GPIO) interface, a subscriber identity module (subscriber identity module, SIM) interface, a universal serial bus (universal serial bus, USB) port, and/or the like.