Method for forming semiconductor structure
地域：
Hsinchu
摘要
A method for forming a semiconductor memory structure include forming a pillar structure. The pillar structure includes a first conductive layer, a second conductive layer and a data storage material layer between the first and second conducive layers. A sidewall of the first conductive layer, a sidewall of the data storage layer and a sidewall of the second conductive layer are exposed. An oxygen-containing plasma treatment is performed on the pillar structure to form hydrophilic surfaces of the sidewall of the first conductive layer, the sidewall of the data storage layer and the sidewall of the second conductive layer. An encapsulation layer is formed over the pillar structure and the dielectric layer. The encapsulation layer is in contact with the hydrophilic surfaces of the sidewall of the first conductive layer, the sidewall of the data storage layer and the sidewall of the second conductive layer.
說明書
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
This patent is a divisional application of U.S. patent application Ser. No. 16/844,875 filed on Apr. 9, 2020, entitled of “SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME”, which claims the benefit of U.S. Provisional Patent Application Ser. No. 62/928,744 filed Oct. 31, 2019, the entire disclosure of which is hereby incorporated by reference.
The semiconductor integrated circuit (IC) industry has experienced rapid growth. Technological advances in IC materials and design have produced generations of ICs. Each generation has smaller and more complex circuits than the previous generation.
In the course of IC evolution, functional density (i.e., the number of interconnected devices per chip area) has generally increased while geometric size (i.e., the smallest component (or line) that can be created using a fabrication process) has decreased. This scaling-down process generally provides benefits by increasing production efficiency and decreasing associated costs. For example, the scaling-down process allows for memory and logic device structures to be integrated together in an IC chip.
However, these advances have increased the complexity of processing and manufacturing ICs. As feature sizes continue to decrease, fabrication processes continue to become more difficult to perform. Therefore, it is increasingly challenging to form reliable IC devices of smaller and smaller sizes.
權(quán)利要求
What is claimed is:1. A method for forming a semiconductor memory structure, comprising:forming a pillar structure over a dielectric layer, wherein the pillar structure comprises a first conductive layer, a second conductive layer and a data storage material layer between the first conductive layer and the second conductive layer, and a sidewall of the first conductive layer, a sidewall of the data storage material layer and a sidewall of the second conductive layer are exposed; performing an oxygen-containing plasma treatment on the pillar structure to form hydrophilic surfaces of the sidewall of the first conductive layer, the sidewall of the data storage material layer and the sidewall of the second conductive layer; and forming an encapsulation layer over the pillar structure and the dielectric layer, wherein the encapsulation layer is in contact with the hydrophilic surfaces of the sidewall of the first conductive layer, the sidewall of the data storage material layer and the sidewall of the second conductive layer. 2. The method of claim 1 , wherein the oxygen-containing plasma treatment comprises at least one material selected from a group consisting of N2O, O2, O3 and H2O. 3. The method of claim 1 , further comprising forming a nucleation layer over the sidewall of the first conductive layer, the sidewall of the data storage material layer and the sidewall of the second conductive layer by the performing of the oxygen-containing plasma treatment, wherein the nucleation layer comprises the hydrophilic surfaces. 4. The method of claim 3 , wherein a thickness of the nucleation layer is between approximately 5 ? and approximately 10 ?. 5. The method of claim 3 , wherein the nucleation layer comprises a first portion over the sidewall of the first conductive layer, a second portion over the sidewall of the data storage material layer and a third portion over the sidewall of the second conductive layer, wherein the second portion comprises a material different from a material of the first portion and a material of the third portion. 6. A method for forming a semiconductor memory structure, comprising:forming a pillar structure over a first dielectric layer, wherein the pillar structure comprises a first conductive layer, a second conductive layer and a data storage material layer between the first conductive layer and the second conductive layer; performing an oxygen-containing plasma treatment on the pillar structure to form a nucleation layer covering the pillar structure and the first dielectric layer; and forming an encapsulation layer over the nucleation layer, wherein the nucleation layer comprises a first portion over a sidewall of the first conductive layer, a second portion over a sidewall of the data storage material layer and a third portion over a sidewall of the second conductive layer, wherein the second portion comprises a material different from a material of the first portion and a material of the third portion. 7. The method of claim 6 , wherein the first portion and the third portion comprise a same material. 8. The method of claim 7 , wherein the first portion and the third portion comprise hydrophilic surfaces. 9. The method of claim 6 , wherein the nucleation layer has a consistent thickness. 10. The method of claim 6 , wherein a thickness of the nucleation layer is between approximately 5 ? and approximately 10 ?. 11. The method of claim 6 , wherein the oxygen-containing plasma treatment comprises at least one material selected from a group consisting of N2O, O2, O3 and H2O. 12. The method of claim 6 , wherein in the forming of the pillar structure further comprises:forming the first conductive layer, the data storage material layer, the second conductive layer and a hard mask layer over the first dielectric layer; and patterning the first conductive layer, the data storage material layer, the second conductive layer and the hard mask layer to form the pillar structure. 13. The method of claim 12 , wherein the nucleation layer is in contact with sidewalls of the hard mask layer and a top surface of the hard mask layer. 14. The method of claim 12 , further comprising:forming a second dielectric layer over the encapsulation layer; and removing a portion of the second dielectric layer, a portion of the encapsulation layer, a portion of the nucleation layer and the hard mask layer to expose a top surface of the second conductive layer. 15. A method for forming a semiconductor memory structure, comprising:forming a pillar structure over a first dielectric layer, wherein the pillar structure comprises a first conductive layer, a data storage material layer over the first conductive layer, a second conductive layer over the data storage material layer, and a patterned hard mask layer over the second conductive layer; performing an oxygen-containing plasma treatment on the pillar structure to form a nucleation layer over the pillar structure; and forming an encapsulation layer over the pillar structure and the first dielectric layer, wherein the nucleation layer comprises a first portion over a sidewall of the first conductive layer, a second portion over a sidewall of the data storage material layer, a third portion over a sidewall of the second conductive layer, and a fourth portion of over a sidewall of the patterned hard mask layer, wherein a thickness of the fourth portion is different from a thickness of the first portion, a thickness of the second portion and a thickness of the third portion. 16. The method of claim 15 , wherein the thickness of the fourth portion of the nucleation layer is less than the thicknesses of the first, second and third portions. 17. The method of claim 15 , wherein the oxygen-containing plasma treatment comprises at least one material selected from a group consisting of N2O, O2, O3 and H2O. 18. The method of claim 15 , wherein the first portion and the third portion comprise a same material, and the second portion comprises a material different from the material of the first portion and a material of the third portion. 19. The method of claim 15 , further comprising:forming a second dielectric layer over the encapsulation layer; and removing a portion of the second dielectric layer, a portion of the encapsulation layer, a portion of the nucleation layer and the patterned hard mask layer to expose a top surface of the second conductive layer. 20. The method of claim 19 , further comprising:forming a third dielectric layer over the pillar structure and the second dielectric layer; and forming a via in the third dielectric layer.
意見反饋
使用該功能遇到問題
該功能需要專業(yè)版企業(yè)版VIP權(quán)限，您可以：
您也可以聯(lián)系官方QQ: 2157717237 電話: 13264338900