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Magnetic random access memory and manufacturing method thereof

專利號
US12178051B2
公開日期
2024-12-24
申請人
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.（TW Hsinchu）
發(fā)明人
Hui-Hsien Wei; Chung-Te Lin; Han-Ting Tsai; Tai-Yen Peng; Yu-Teng Dai; Chien-Min Lee; Sheng-Chih Lai; Wei-Chih Wen
IPC分類
H10B61/00; B82Y25/00; G11C11/16; H01F41/30; H10N50/01; H10N50/10; H10N50/80; H10N50/85
技術(shù)領(lǐng)域
layer,insulating,mtj,mram,ild,cover,in,electrode,nm,dielectric
地域： Hsinchu

摘要

In a method of manufacturing a semiconductor device, a magnetic random access memory (MRAM) cell structure is formed. The MRAM cell structure includes a bottom electrode, a magnetic tunnel junction (MTJ) stack and a top electrode. A first insulating cover layer is formed over the MRAM cell structure. A second insulating cover layer is formed over the first insulating cover layer. An interlayer dielectric (ILD) layer is formed. A contact opening in the ILD layer is formed, thereby exposing the second insulating cover layer. A part of the second insulating cover layer and a part of the first insulating cover layer are removed, thereby exposing the top electrode. A conductive layer is formed in the opening contacting the top electrode.

說明書

Then, as shown in FIG. 10B, contact openings 242 are formed by using one or more lithography and etching operations. Because the selectivity in the etching operation between the second insulating cover layer 280 and the fourth ILD layer is high, the etching operation can utilize the second insulating cover layer 280 as an etch stop layer.

權(quán)利要求

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