Here, in the embodiment, the first insulation film 25 is formed of silicon nitride, and the second insulation film 26 and the third insulation film 27 are formed of silicon oxide. Further, the insulation film, which is arranged between the relay electrode 14c and the relay electrode 106, is formed of silicon nitride. Therefore, when the second insulation film 26 and the third insulation film 27, which are formed of silicon oxide, are processed, it is possible to improve a processing accuracy for enabling an etching selection ratio with regard to the first insulation film 25 to be acquired, and it is possible to securely connect the relay electrode 14c to the pixel electrode 31.
In the first area 28B, the pixel electrode 31B is provided on the first insulation layer 28 (first insulation film 25) which has the film thickness Bd1, and the pixel electrode 31B is directly connected to the relay electrode 106B. In the second area 28G, the pixel electrode 31G is provided on the first insulation layer 28 (the first insulation film 25 and the second insulation film 26) which has the film thickness Gd1, the pixel electrode 31G is connected to the relay electrode 106G through the contact hole 28CT1. In the third area 28R, the pixel electrode 31R is provided on the first insulation layer 28 (the first insulation film 25, the second insulation film 26, and the third insulation film 27) which has the film thickness Rd1, and the pixel electrode 31R is connected to the relay electrode 106R through the contact hole 28CT2.