For example, before forming the passivation insulating layer PVX, the manufacturing method of the display panel further comprises: sequentially forming a buffer layer BF, an active layer 191, a first gate electrode insulating layer GIL1 covering the active layer 191, a gate electrode 192 located on a side of the first gate electrode insulating layer GIL1 away from the base substrate 11, a second gate electrode insulating layer GIL2 covering the gate electrode 192, a first intermediate insulating layer IIL1 covering the second gate electrode insulating layer GIL2, and a first source/drain electrode layer 1710 located on a side of the first intermediate insulating layer IIL1 away from the base substrate 11. The first source/drain electrode layer 1710 includes a source electrode 193 and a drain electrode 194 electrically connected to the active layer 191, for example, the source electrode 193 and the drain electrode 194 extend through through-holes in the first intermediate insulating layer TILL the second gate electrode insulating layer GIL2, and the first gate electrode insulating layer GIL1 to be electrically connected with the active layer 191.
Upon the structures of the display panel in the embodiments of the present disclosure changing, the above steps of the manufacturing method are adjusted accordingly.
At least one embodiment of the present disclosure further provides an alignment method, which can be used for alignment in the manufacturing process of the display panel as provided in any one of the embodiments shown in