Electronic device
摘要
說明書
The fourth insulating layer 204 may be disposed on the substrate 100 on which the second gate insulating layer 132 is disposed.
The second gate electrode 160 of the second transistor T2 may be disposed on the fourth insulating layer 204.
The fifth insulating layer 205 and the sixth insulating layer 206 may be sequentially disposed on the second gate electrode 160.
The second gate electrode 160 of the second transistor T2 may correspond to the first gate line 160.
In another aspect, the second gate electrode 160 of the second transistor T2 may be integrated with the first gate electrode 160 of the first transistor T1. In other words, the second gate electrode 160 of the second transistor T2 and the first gate electrode 160 of the first transistor T1 may correspond to the single first gate line 160.
Specifically, as shown in
According to the embodiment of the present disclosure, in the structure, the first gate electrode 160 of the first transistor T1 and the second gate electrode 160 of the second transistor T2 do not branch from the first gate line 160. Consequently, it is possible to reduce the area of subpixels SP in the active region A/A by an area required for branching out into the first and second gate electrodes 160.
