Electronic device
摘要
說明書
In the first transistor, a fourth electrode may be disposed on the substrate, a fourth insulating layer may be disposed on the first electrode, the first conductive layer may be disposed on the fourth insulating layer, the first insulating layer may be disposed on the first conductive layer, the second conductive layer may be disposed on the first insulating layer, a fifth insulating layer may be disposed on the second conductive layer, the fourth insulating layer, the first insulating layer, and the fifth insulating layer may include a seventh hole exposing a part of an upper surface of the fourth electrode, and one end of the first active layer may be in contact with the fourth electrode through the seventh hole.
A second transistor may include a sixth electrode disposed on the substrate, a second active layer including a second channel region and disposed on an insulating layer disposed on the sixth electrode and including a ninth hole exposing a part of an upper surface of the sixth electrode, a second gate insulating layer disposed on the second active layer, and a first gate electrode disposed on the second gate insulating layer.
A third transistor may include a seventh electrode disposed apart from the sixth electrode on the substrate, a third active layer including a third channel region and disposed on an insulating layer disposed on the seventh electrode and including a tenth hole exposing a part of an upper surface of the seventh electrode, a first gate insulating layer disposed on the third active layer, and a second gate electrode disposed on the first gate insulating layer.
According to embodiments of the present disclosure, it is possible to provide a TFT array substrate including a transistor having a structure which allows forming of a short channel and integration and an electronic device including the TFT array substrate.
