Electronic device
摘要
說明書
According to embodiments of the present disclosure, it is possible to provide a TFT array substrate including a transistor having a structure in which a driving margin is increased through a high S-parameter among a plurality of transistors disposed in a panel and an electronic device including the TFT array substrate.
According to embodiments of the present disclosure, it is possible to provide a TFT array substrate including a transistor having a structure which allows fabrication of an ultra-high definition panel with a reduction in device area and an electronic device including the TFT array substrate.
According to embodiments of the present disclosure, it is possible to provide a TFT array substrate including a transistor having a structure in which an active layer and an insulating layer have no disconnection and an electronic device including the TFT array substrate.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the inventive concepts as claimed.
The accompanying drawings, which are included to provide a further understanding of the disclosure and are incorporated in and constitute a part of this application, illustrate embodiments of the disclosure and together with the description serve to explain various principles. In the drawings:
