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Electronic device

專利號
US12178090B2
公開日期
2024-12-24
申請人
LG Display Co., Ltd.(KR Seoul)
發(fā)明人
SeHee Park; InTak Cho; PilSang Yun
IPC分類
H10K59/131; G09G3/3291; H10K59/124
技術(shù)領(lǐng)域
layer,insulating,transistor,electrode,gate,active,may,disposed,first,region
地域: Seoul

摘要

Provided is an electronic device. The electronic device includes at least one first transistor to which a data voltage is applied. The first transistor includes a first conductive layer disposed on a substrate and a first active layer, which is disposed on the first conductive layer, has one end and the other end which are made conductive, and includes a first channel region disposed between the one end and the other end. A second conductive layer overlapping the first conductive layer with a first insulating layer interposed between the second conductive layer and the first conductive layer is included in a storage capacitor in a panel, and the storage capacitor is disposed under the first channel region of the first active layer. In this way, an ultra-high definition panel is fabricated.

說明書

The second gate insulating layer 132 may also extend in the same direction as the data line 110 extends.

In addition, the second gate insulating layer 132 may overlap a part of the second active layer material 140a and the third hole H3.

In the dry etching process, the first and second active layer materials 130a and 140a disposed in regions in which the first and second gate insulating layers 131 and 132 are disposed remain without any change, but the first and second active layer materials 130a and 140a disposed in regions from which the gate insulating layer material is removed may be made conductive.

In the dry etching process, the first and second gate insulating layers 131 and 132 may shield the first and second active layers 130 and 140 disposed thereunder from plasma. In this case, the first and second gate insulating layers 131 and 132 may also shield the second part 232 and the sixth part 246 of the first and second active layers 130 and 140 from plasma.

In another aspect, the first and second gate insulating layers 131 and 132 may prevent the first and second channel regions CHA1 and CHA2 of the first and second active layers 130 and 140 from being made conductive in the dry etching process.

For this reason, the first active layer 130 may include the fourth part 234 which is not made conductive in a region not overlapping the first gate insulating layer 131, and the second active layer 140 may include the eighth part 248 which is not made conductive in a region not overlapping the second gate insulating layer 132.

權(quán)利要求

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