Electronic device
摘要
說明書
Subsequently, the seventh to ninth holes H7 to H9 may be formed in the first and second insulating layers 401 and 402 through a photolithography process employing a half-tone mask. However, the present disclosure is not limited thereto, and different masks may be used to form the seventh to ninth holes H7 to H9.
The seventh hole H7 may be formed in the first and second insulating layers 401 and 402 and may expose a part of the upper surface of the fourth electrode 411 of the first transistor T1.
The eighth hole H8 may be formed in the first and second insulating layers 401 and 402 and may expose a part of the upper surface of the fifth electrode 421 of the second transistor T2.
The ninth hole H9 may be formed in the second insulating layer 402 and may expose a part of the upper surface of the first conductive layer 450.
Subsequently, as shown in
Specifically, an active layer material may be formed on the substrate 400 on which the second insulating layer 402 is disposed.
As shown in
