In an embodiment, a single frame period may include a gate initialization period, a data write and anode initialization period, and an emission period. In the gate initialization period, a synchronization with a second scan signal (GI_1 to GI_m) may be performed, and the first initialization voltage VINT1 may be applied to the pixels PX. In the data write and anode initialization period, the data voltage Dm_1 to Dm_n may be provided to the pixels PX by performing synchronization with a first scan signal GW, and the second initialization voltage VINT2 may be applied to the pixels PX by performing synchronization with a third scan signal (GB_1 to GB_m). In the emission period, the pixels PX of the display unit 110 emit light.
The timing controller 140 receives the image source data RGB and a control signal CONT from the outside. The timing controller 140 may convert the image source data RGB to an image data DATA based on characteristics of the display unit 110 and the pixels PX or the like. The timing controller 140 may provide the image data DATA to the data driver 130.