In
The gate initialization transistor T4 applies the first initialization voltage VINT1 to the gate of the driving transistor T1 in response to the second scan signal GI_i. The gate initialization transistor T4 may include a gate connected to the second scan line GIL_i, a source S connected to the gate of the driving transistor T1, and a drain D connected to the first voltage line VL1.
The first pixel PXi(j?1) and the second pixel PXij may share the first contact plug CP1 connected to the first voltage line VL1. When the gate initialization transistors T4 of the first pixel PXi(j?1) and the second pixel PXij are turned on in response to the second scan signal GI_i, the first initialization voltage VINT1 received via the first contact plug CP1 may be applied to the gates of the driving transistors T1 of the first pixel PXi(j?1) and the second pixel PXij.