A plurality of constant voltage traces V, a plurality of scan lines Sc, and a plurality of gate traces G are also provided in the display area AA of the display panel. The constant voltage trace V provides a specific voltage within the constant voltage trace V to meet voltage requirements of a portion of the traces and the light-emitting elements in the display panel. The scan line Sc is used to provide a scanning signal to adjust the timing of light emission display of each sub-pixel P. The gate trace G is connected to the driving transistor T1 in the pixel circuit to control the operation state of the driving transistor T1.

Specifically, a first metal layer, a second metal layer, and a shield layer between the first metal layer and the second metal layer are disposed in a film layer structure of the display panel, the gate traces G are disposed in the first metal layer, and the drive traces S1 are disposed in the second metal layer. The display panel further includes shield traces B disposed in the shield layer, and the shield trace B is electrically connected to the constant voltage trace V to ensure a specific voltage on the shield trace B. An insulating layer SP is provided between the first metal layer and the shield layer, between the shield layer and the second metal layer, on a side of the first metal layer away from the shield layer, and on a side of the second metal layer away from the shield layer (referring to FIG. 3).