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Method for manufacturing a semiconductor storage device including a division film

專利號
US12185539B2
公開日期
2024-12-31
申請人
Kioxia Corporation（JP Tokyo）
發(fā)明人
Kazuharu Yamabe; Yoshiro Shimojo
IPC分類
H10B43/27
技術(shù)領(lǐng)域
columnar,film,insulating,sgdo,cl2a,cl2b,body,stacked,conductive,bodies
地域： Tokyo

摘要

In a method for manufacturing a memory, a first stacked body is formed by stacking a first insulating film and a first sacrificial film. A first columnar body including a first semiconductor portion extending in the first stacked body in the first direction and a charge trapping film provided on an outer peripheral surface of the first semiconductor portion is formed. A second columnar body provided in a second direction of the first columnar body and including a second semiconductor portion stretching in the first stacked body in the first direction and a charge trapping film on an outer peripheral surface of the second semiconductor portion is formed. A second insulating film is formed above the first stacked body. A third columnar body including a third semiconductor portion provided on both the first columnar body and the second columnar body and stretching in the second insulating film in the first direction and a first gate insulating film provided on an outer peripheral surface of the third semiconductor portion is formed. A first division insulating film extending in the first direction and a third direction intersecting the first direction and the second direction and dividing the third semiconductor portion of the third columnar body in the second direction is formed.

說明書

According to the embodiment, in the columnar bodies CL2a and CL2b, the region other than the region facing the first division insulating film 50 faces the second conductive film 22 via the first gate insulating film 203 as the channel region of the drain-side select gate SGDO. Accordingly, the channel width of the drain-side select gate SGDO can be increased, and the drain-side select gate SGDO can allow a sufficient current from the selected memory cell MC to flow. The semiconductor portion 202 and the first gate insulating film 203 do not exist in the region facing the first division insulating film 50 other than the channel region. Therefore, it is possible to prevent erroneous writing of data to the first gate insulating film 203, the occurrence of off-leakage, and the generation of electron traps. Therefore, the controllability of the drain-side select gate SGDO is improved.

Second Embodiment

FIG. 13A is a schematic plan view of the second stacked body according to the second embodiment as seen from the Z direction. FIG. 13B is a schematic plan view of the region 13B in FIG. 13A.

權(quán)利要求

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