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Method for manufacturing a semiconductor storage device including a division film

專利號
US12185539B2
公開日期
2024-12-31
申請人
Kioxia Corporation（JP Tokyo）
發(fā)明人
Kazuharu Yamabe; Yoshiro Shimojo
IPC分類
H10B43/27
技術(shù)領(lǐng)域
columnar,film,insulating,sgdo,cl2a,cl2b,body,stacked,conductive,bodies
地域： Tokyo

摘要

In a method for manufacturing a memory, a first stacked body is formed by stacking a first insulating film and a first sacrificial film. A first columnar body including a first semiconductor portion extending in the first stacked body in the first direction and a charge trapping film provided on an outer peripheral surface of the first semiconductor portion is formed. A second columnar body provided in a second direction of the first columnar body and including a second semiconductor portion stretching in the first stacked body in the first direction and a charge trapping film on an outer peripheral surface of the second semiconductor portion is formed. A second insulating film is formed above the first stacked body. A third columnar body including a third semiconductor portion provided on both the first columnar body and the second columnar body and stretching in the second insulating film in the first direction and a first gate insulating film provided on an outer peripheral surface of the third semiconductor portion is formed. A first division insulating film extending in the first direction and a third direction intersecting the first direction and the second direction and dividing the third semiconductor portion of the third columnar body in the second direction is formed.

說明書

In a plan view seen from the Z direction, the contact VY may be a substantially circular shape, but may be a substantially elliptical shape having a major axis in the X direction. Accordingly, since the contact VY spreads in the X direction, the bit line BL can be reliably connected by the contact VY even if the bit line BL is slightly deviated in the X direction due to the lithography. However, as long as the contact VY can connect between the contact CH and the bit line BL, the direction of the major axis of the contact VY is not particularly limited. The direction of the major axis of the contact CH is not particularly limited.

Other configurations and manufacturing methods of the third embodiment may be the same as those of the first embodiment. Accordingly, according to the third embodiment, it is also possible to obtain the effects of the first embodiment. The third embodiment may be applied to the second embodiment.

Fourth Embodiment

FIGS. 19A and 19B are a plan view and a cross-sectional view illustrating a configuration example of a semiconductor storage device 100d according to the fourth embodiment. FIG. 19B is a schematic cross-sectional view taken along line N-N of FIG. 19A.

權(quán)利要求

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