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Method for manufacturing a semiconductor storage device including a division film

專利號
US12185539B2
公開日期
2024-12-31
申請人
Kioxia Corporation(JP Tokyo)
發(fā)明人
Kazuharu Yamabe; Yoshiro Shimojo
IPC分類
H10B43/27
技術(shù)領(lǐng)域
columnar,film,insulating,sgdo,cl2a,cl2b,body,stacked,conductive,bodies
地域: Tokyo

摘要

In a method for manufacturing a memory, a first stacked body is formed by stacking a first insulating film and a first sacrificial film. A first columnar body including a first semiconductor portion extending in the first stacked body in the first direction and a charge trapping film provided on an outer peripheral surface of the first semiconductor portion is formed. A second columnar body provided in a second direction of the first columnar body and including a second semiconductor portion stretching in the first stacked body in the first direction and a charge trapping film on an outer peripheral surface of the second semiconductor portion is formed. A second insulating film is formed above the first stacked body. A third columnar body including a third semiconductor portion provided on both the first columnar body and the second columnar body and stretching in the second insulating film in the first direction and a first gate insulating film provided on an outer peripheral surface of the third semiconductor portion is formed. A first division insulating film extending in the first direction and a third direction intersecting the first direction and the second direction and dividing the third semiconductor portion of the third columnar body in the second direction is formed.

說明書

The second stacked body 2 is provided above the first stacked body 1. The third stacked body 3 is provided between the first stacked body 1 and the second stacked body 2. A columnar body CL2 penetrates the second stacked body 2 and is provided with a drain-side select gate SGDO. Although not illustrated in FIG. 1A, a columnar body CL3 penetrates the third stacked body 3 and is provided with a drain-side select gate SGD. The two columnar bodies CL2 and CL3 are provided corresponding to each columnar body CL1 and are continuous on the corresponding columnar body CL1. Therefore, the columnar body CL3 is connected on the first columnar body CL1, and the columnar body CL2 is connected on the columnar body CL3. The drain-side select gates SGDO and SGD are configured so that the corresponding columnar body CL1 (memory string) can be selectively connected to the bit line BL. More detailed configurations of the second and third stacked bodies 2 and 3 and the drain-side select gates SGDO and SGD will be described later.

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