For the various embodiments of the receive path, a unidirectional level shifter 214 provides multi-voltage level shifting without customer intervention. A unidirectional level shifter 214 can provide the capability to receive 1.65V-5.5V and transmit at a specific VCC voltage. Example implementations of level shifter 214 include Texas Instruments SN74LV1T125 or Nexperia 74LV1T125. Level shifter 214 can support a wide input range including 5.5V and a 3.3V output with a single VCC source and can be isolated when off and disabled (e.g., an open circuit) to provide protection against circuit damage from received current. Level shifter 214 can support a current above the system controller 250 maximum rated current (e.g., 12 mA or some other value) and provide low propagation delay, low rise time and low capacitance. Other voltage shift ranges can be used. In addition, level shifter 214 is able to provide isolation during a transmission disabled state against transmitted signals during a receive state. In order to protect against the event of signal transmitting and receiving at the same time, a series resistor 216 is provided between level shifter 214 and system controller 250. Current protection resistor 216 protects from level shifter 214 driving an output to controller 250 high while controller 250 drives an input to level shifter 214 low, which is an error situation of output signal to level shifter through a path of current protection resistor 216. Although the rise time will be impacted by series resistor 216, the rise time delay can be consistent and therefore characterized and taken into account and accommodated for to determine accurate time stamp receipt times. For example, a consistent rise time can be used by clock-disciplining driver software (e.g., driver to control PTP hardware clock counter) to adjust time stamp receipt time by reducing the time stamp receipt time by the rise time. In another example, an output voltage from a digital-to-analog converter (DAC) can be adjusted to adjust a frequency of a crystal oscillator to reduce the time stamp receipt time by the rise time.