In some embodiments, the processor 224 is connected to a conventional PCB 238. In some embodiments, the processor 224 is integrally formed with a silicon wafer. For example, a first die 232 may be integrally formed with a silicon wafer. The first die 232 and the second die 234, separated by the microfluidic volume 236, may be connected by one or more heat transfer structures 240 positioned between the first die 232 and the second die 234. In some embodiments, the heat transfer structures 240 are configured to transfer heat from the first die 232 and/or the second die 234 to the first electrochemical fluid 208 and/or the second electrochemical fluid 210 positioned in the microfluidic volume 236.
While some processors according to the present disclosure have a first electrochemical fluid positioned in the microfluidic volume and a second electrochemical fluid positioned outside of the microfluidic volume, other embodiments of a processor have both the first electrochemical fluid and the second electrochemical fluid positioned in the microfluidic volume. For example, an ion-transfer membrane is positioned in the microfluidic volume to separate the first electrochemical fluid and the second electrochemical fluid. In at least one embodiment, the ion-transfer membrane is a heat transfer structure that allows the movement of ions across and heat through the membrane.