In a conventional processor, the die is connected to a printed circuit board (PCB), which delivers electrical power to the die via one or more wire traces. The delivery of electrical power through the wire traces can be inefficient from an electrical standpoint and/or a design space standpoint. Further, conventionally, heat generated by the processor is transmitted by a thermal interface material (TIM) to a heat spreader that is in contact with a heat sink or other interface to exhaust the heat to a liquid coolant or to the ambient atmosphere. In some instances, the thermal management components and interfaces can limit the amount of heat exhausted. In the case of stacked-die processors, conventional thermal management may be incapable of cooling all dies in the processor.

In some embodiments, a stacked-die processor includes at least a first die and a second die stacked with pin fins or other heat transfer structures therebetween. In some embodiments, the heat transfer structures contain through silicon vias (TSVs) therein to electrically connect the first die and second die. In some examples, a first microfluidic volume is located between the first die and the second die, and a first set of pin fins couples the first die and the second die through the first microfluidic volume. In some embodiments, a second microfluidic volume is located between the second die and the third die, and a second set of pin fins couples the second die and the third die through the second microfluidic volume.