The invention claimed is:1. A cell structure of a silicon carbide MOSFET device, comprising:a first conductivity type drift region, which is located above a first conductivity type substrate;a main trench, which is provided downwardly in a surface of the drift region, a Schottky metal being provided on surfaces of a bottom and sidewalls of the main trench;a second conductivity type well region, which is located in the surface of the drift region and provided around the main trench;a first conductivity type source region, which is located in a surface of the well region, wherein the source region is located at a side, close to the main trench, of the well region, but is not in contact with the main trench;a gate structure, which is located at sides, close to the main trench, of the source region, the well region, and the drift region, wherein the gate structure comprises a gate and a gate insulating layer for isolating the gate from the source region, the well region, and the drift region;a source metal, which is located above the source region; anda drain metal, which is located below the substrate,wherein, the source metal is connected to the Schottky metal via a source compacted block metal above the source metal, and at least the gate in the gate structure is isolated from the source metal, the Schottky metal, and the source compacted block metal,the well region is provided to be in contact with the main trench, and the side, close to the main trench, of the well region is not completely covered by the source region;the gate structure comprises a polycrystalline silicon trench gate structure;a gate trench separated from the main trench is provided downwardly in the surface of the well region at an area which is at the side, close to the main trench, of the well region and is not completely covered by the source region, wherein the gate trench has a depth greater than a depth of the well region, and a wall, at a side distant from the main trench, of the gate trench is in contact with the source region, the well region, and the drift region at the same time; andthe gate insulating layer of the trench gate structure is provided on a bottom and walls of the gate trench, and is used to isolate the gate of the trench gate structure provided in the gate trench from the source region, the well region, and the drift region.2. The cell structure of the silicon carbide MOSFET device according to claim 1, whereinthe well region is provided to be separated from the main trench, and the side, close to the main trench, of the well region is not completely covered by the source region;the gate structure comprises a polycrystalline silicon planar gate structure; andthe gate insulating layer of the planar gate structure is located on surfaces of the source region, the well region and the drift region, and is in contact with the surfaces of the source region, the well region and the drift region at the same time; and the gate of the planar gate structure is provided above the gate insulating layer.3. The cell structure of the silicon carbide MOSFET device according to claim 2, wherein the cell structure further comprises:a second conductivity type shielding layer, which is provided at a local area where the Schottky metal is in contact with the drift region.4. The cell structure of the silicon carbide MOSFET device according to claim 1, whereinthe gate and the gate insulating layer are isolated from the source metal, the Schottky metal, and the source compacted block metal by the interlayer dielectric.5. The cell structure of the silicon carbide MOSFET device according to claim 4, whereinin addition to the source region, the well region further comprises a second conductivity type enhancement region therein, wherein the enhancement region is located at a side, distant from the main trench, of the well region; andthe source metal is located on both the source region and the enhancement region.6. The cell structure of the silicon carbide MOSFET device according to claim 5, whereinthe source region has a concentration being greater than or equal to 1×1019 cm?3;the enhancement region has a concentration being greater than 5×1018 cm?3;the well region has a concentration in a range of 1×1016 to 5×1018 cm?3;the drift region has a concentration in a range of 1×1014 to 5×1016 cm?3;the gate has a concentration being greater than or equal to 1×1018 cm?3; andthe gate insulating layer has a thickness being ≥40 nm.7. The cell structure of the silicon carbide MOSFET device according to claim 1, whereina cross section of the main trench at which the Schottky metal is located has a shape of a rectangle, an isosceles trapezoid, a semicircle, a semiellipse, or other shapes with a symmetric structure.8. A silicon carbide MOSFET device, wherein the MOSFET device comprises several cell structures of the silicon carbide MOSFET device according to claim 1.9. The silicon carbide MOSFET device according to claim 8, whereinthe device has a cell shape such as a strip, a circle, a quadrangle, or a hexagon, as well as any combination of various shapes.