According to an embodiment of the disclosure, with reference to FIG. 1 to FIG. 2B, an array region of a semiconductor substrate 10 may include: multiple word line trenches formed on the semiconductor substrate 10 and word line structures 200 embedded in word line trenches. Each word line trench is disposed to intersect with corresponding active regions 100 of the word line trenches. That is, the word line structures intersect with the corresponding active regions 100. A word line trench includes a first word line trench 400A and a second word line trench 400B. The orthographic projection of the first word line trench 400A on the semiconductor substrate 10 is positioned within the orthographic projection of the respective STI region 300 on the semiconductor substrate 10; and the orthographic projection of the second word line trench 400B on the semiconductor substrate 10 is positioned within the orthographic projections of the respective active region 100 on the semiconductor substrate 10. The word line structure 200 includes a first word line structure part 200A and a second word line structure part 200B electrically connected to each other. The first word line structure part 200A is formed in the respective first word line trench 400A and the second word line structure part 200B is formed in the respective second word line trench 400B.