Illustratively, step S20 may specifically include the steps, for example that: an STI mask is formed on the semiconductor substrate 10, and regions of the semiconductor substrate 10 covered by the STI mask are active regions 100. Then, the STI mask is used as an etching mask, and a vapor phase etching process is adopted, and etching gas may be one or more of SF6, CF4, Cl2, CHF3, O2 or Ar, so as to achieve a certain etching selection ratio. The exposed semiconductor substrate 10 is etched to form STI trenches, so that regions of the semiconductor substrate 10 in which the active regions 100 are to be formed are reserved. Thereafter, the STI mask is removed, and the semiconductor substrate 10 with the STI trenches ST0 illustrated in FIG. 3A is formed.

Thereafter, with reference to FIG. 3B, the SiN is filled in the STI trenches ST0 as STI layer 300, then the STI regions 300 are formed, and multiple active regions 100 are defined on the semiconductor substrate 10 by the STI regions 300.

At S30, a word line trench intersecting with the corresponding active regions 100 is formed on the semiconductor substrate 10.

According to an embodiment of the disclosure, step S30, for example, may specifically include the following steps.