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Method of fabricating semiconductor device

專利號(hào)
US12268028B2
公開日期
2025-04-01
申請(qǐng)人
UNITED MICROELECTRONICS CORP.(TW Hsin-Chu)
發(fā)明人
Po-Yu Yang
IPC分類
H10D64/01; H10D30/01; H10D30/47; H10D62/10; H10D64/23
技術(shù)領(lǐng)域
layer,electrode,extension,dielectric,vertical,barrier,may,channel,portion,be
地域: Hsin-Chu

摘要

A method of fabricating a semiconductor device includes the following steps. A substrate is provided. A semiconductor channel layer is formed on the substrate. A semiconductor barrier layer is formed on the semiconductor channel layer. An etching process is performed to expose a portion of the semiconductor channel layer. A dielectric layer is formed to cover the semiconductor barrier layer and the exposed semiconductor channel layer. A first electrode is formed after forming the dielectric layer, where the first electrode includes a body portion and a vertical extension portion, the body portion is electrically connected to the semiconductor barrier layer, and a bottom surface of the vertical extension portion is lower than a top surface of the semiconductor channel layer.

說明書

CROSS REFERENCE TO RELATED APPLICATIONS

This application is a division of U.S. application Ser. No. 17/955,526, filed on Sep. 28, 2022, which is a continuation application of U.S. application Ser. No. 17/148,539, filed on Jan. 13, 2021. The contents of these applications are incorporated herein by reference.

BACKGROUND OF THE INVENTION 1. Field of the Invention

The present invention relates to the field of semiconductor devices, and more particularly to high electron mobility transistors and fabricating method thereof.

2. Description of the Prior Art

In semiconductor technology, group III-V semiconductor compounds may be used to form various integrated circuit (IC) devices, such as high power field-effect transistors (FETs), high frequency transistors, or high electron mobility transistors (HEMTs). A HEMT is a field effect transistor having a two dimensional electron gas (2-DEG) layer close to a junction between two materials with different band gaps (i.e., a heterojunction). The 2-DEG layer is used as the transistor channel instead of a doped region, as is generally the case for metal oxide semiconductor field effect transistors (MOSFETs). Compared with MOSFETs, HEMTs have a number of attractive properties such as high electron mobility and the ability to transmit signals at high frequencies. However, there is still a need to improve the breakdown voltage (VBR) of conventional HEMTs in order to meet the requirements of the industry.

SUMMARY OF THE INVENTION

In view of this, it is necessary to provide an improved high electron mobility transistor so as to meet the requirements of the industry.

權(quán)利要求

1
What is claimed is:1. A method for fabricating a semiconductor device, comprising:providing a substrate;forming a semiconductor channel layer on the substrate;forming a semiconductor barrier layer on the semiconductor channel layer;performing an etching process to expose a portion of the semiconductor channel layer;forming a dielectric layer covering the semiconductor barrier layer and the exposed semiconductor channel layer; andforming a first electrode after forming the dielectric layer, wherein the first electrode comprises a body portion and a vertical extension portion, the body portion is electrically connected to the semiconductor barrier layer, and a bottom surface of the vertical extension portion is lower than a top surface of the semiconductor channel layer, wherein the first electrode is a conformal layer covers the semiconductor barrier layer and the semiconductor channel layer.2. The method for fabricating the semiconductor device according to claim 1, wherein the first electrode further comprises a conformal horizontal extension portion covering a portion of the semiconductor barrier layer and a portion of the dielectric layer.3. The method for fabricating the semiconductor device according to claim 1, further comprising:forming a semiconductor buffer layer on the substrate before forming the semiconductor channel layer;performing the etching process to expose the portion of the semiconductor channel layer and a portion of the semiconductor buffer layer; andforming the dielectric layer covering the semiconductor barrier layer, the exposed semiconductor channel layer and the exposed semiconductor buffer layer.4. The method for fabricating the semiconductor device according to claim 1, wherein the dielectric layer is in direct contact with the semiconductor buffer layer and the vertical extension portion.5. The method for fabricating the semiconductor device according to claim 1, wherein a thickness of the dielectric layer is smaller than a vertical length of the vertical extension portion.6. The method for fabricating a semiconductor device according to claim 1, further comprising:etching a portion of the dielectric layer and a portion of the semiconductor barrier layer after forming the dielectric layer;depositing a conductive layer on the dielectric layer; andpatterning the conductive layer to form the first electrode.
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