Semiconductor devices comprising carbon-doped silicon nitride and related methods
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ID
ID Boise
摘要
A semiconductor device structure that comprises tiers of alternating dielectric levels and conductive levels and a carbon-doped silicon nitride over the tiers of the staircase structure. The carbon-doped silicon nitride excludes silicon carbon nitride. A method of forming the semiconductor device structure comprises forming stairs in a staircase structure comprising alternating dielectric levels and conductive levels. A carbon-doped silicon nitride is formed over the stairs, an oxide material is formed over the carbon-doped silicon nitride, and openings are formed in the oxide material. The openings extend to the carbon-doped silicon nitride. The carbon-doped silicon nitride is removed to extend the openings into the conductive levels of the staircase structure. Additional methods are disclosed.
說(shuō)明書(shū)
This application is a continuation of U.S. patent application Ser. No. 15/685,690, filed Aug. 24, 2017, now U.S. Pat. No. 11,282,845, issued Mar. 22, 2022, the disclosure of which is hereby incorporated herein in its entirety by this reference.
Embodiments disclosed herein relate to fabrication of semiconductor device structures, such as semiconductor device structures including staircase structures, and to methods of forming the semiconductor device structures. More particularly, embodiments of the disclosure relate to semiconductor device structures having the staircase structures and comprising carbon-doped silicon nitride and having contacts of different depths and to methods of forming the semiconductor device structures.
權(quán)利要求
What is claimed is:1. A semiconductor device comprising:a staircase structure comprising tiers of alternating dielectric levels and conductive levels and exhibiting a stepped profile; a carbon-doped silicon nitride over the tiers, the carbon-doped silicon nitride excluding silicon carbon nitride comprising a stoichiometric amount of carbon; and contacts extending vertically through the dielectric levels and into but not through the conductive levels of the tiers, each contact in direct contact with a dielectric level and a conductive level of a different stair of the staircase structure. 2. The semiconductor device of claim 1 , wherein top surfaces of the contacts are substantially coplanar with each other. 3. The semiconductor device of claim 1 , wherein top surfaces of the contacts are substantially coplanar with an uppermost surface of the carbon-doped silicon nitride. 4. The semiconductor device of claim 1 , wherein the carbon-doped silicon nitride comprises a substantially homogeneous composition. 5. The semiconductor device of claim 1 , wherein the carbon-doped silicon nitride exhibits a stepped profile. 6. The semiconductor device of claim 1 , wherein the contacts extend a predetermined depth into the conductive levels of the tiers. 7. The semiconductor device of claim 6 , wherein the predetermined depth into the conductive levels is substantially equal for each of the contacts. 8. A semiconductor device comprising:a staircase structure comprising tiers of alternating dielectric levels and conductive levels; an etch stop material comprising carbon-doped silicon nitride over the tiers of the staircase structure, the etch stop material comprising a non-stoichiometric amount of carbon; and contacts extending into the conductive levels of the tiers, wherein the etch stop material is in direct contact with horizontal surfaces of the dielectric levels of the tiers and the contacts are in direct contact with the conductive levels. 9. The semiconductor device of claim 8 , wherein the contacts extend into but not through the conductive levels of the tiers. 10. The semiconductor device of claim 8 , wherein the carbon-doped silicon nitride is in direct contact with the dielectric levels and the conductive levels of each tier. 11. The semiconductor device of claim 8 , wherein the carbon-doped silicon nitride comprises carbon at from about 1% by weight (wt %) to about 30 wt %. 12. The semiconductor device of claim 8 , wherein the etch stop material is in direct contact with vertical surfaces of the tiers. 13. The semiconductor device of claim 8 , wherein the conductive levels comprise a metal or a conductively-doped semiconductor material. 14. A semiconductor device comprising:a staircase structure comprising tiers of alternating dielectric levels and conductive levels; an etch stop material comprising hafnium oxide at least partially over the tiers of the staircase structure; contacts extending through the etch stop material, the dielectric levels, and into but not through the conductive levels of the tiers, each conductive level in direct electrical contact with a respective contact; a channel material extending through a portion of the tiers of the dielectric levels and conductive levels; and memory cells along a length of the channel material. 15. The semiconductor device of claim 14 , wherein each contact of the contacts is in electrical contact with a contact region of a different conductive level of the tiers. 16. The semiconductor device of claim 14 , wherein at least one of the contacts comprises a different height than a height of another of the contacts. 17. The semiconductor device of claim 14 , wherein each contact of the contacts comprises a different height than a height of another of the contacts. 18. The semiconductor device of claim 14 , further comprising an oxide material over the etch stop material, wherein an upper surface of the etch stop material is substantially coplanar with an upper surface of the oxide material. 19. The semiconductor device of claim 14 , wherein a thickness of the etch stop material is substantially uniform. 20. The semiconductor device of claim 14 , wherein the etch stop material comprises a thickness of from about 50 ? to about 600 ?.
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